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EE5302: CAD for VLSI II, Spring 2005

EE5302-Spring-2005

PLEASE NOTE NEW CLASS LOCATIONS AND TIMES BELOW

Class slides (protected access)

Homeworks (protected access)

  • Credits: 3
  • Location/Time: ME 102 (T, 9:45-11) and ECE 4-146 (Th, 9-11). See the ((EE5302Spring2005classSchedule|detailed class schedule (protected access) )) for exceptions.
  • Instructor: Jaijeet Roychowdhury, 4-155 EE/CSci, jr at ece.umn.edu

Course Description
This course provides additional essential background for students interested in pursuing a research/development career in computer-aided design of integrated circuits (CAD for ICs). Topics covered include circuit simulation, reduced-order modelling, digital representations, logic synthesis and the basics of electromagnetics.

Prerequisites
Undergraduate-level background in analog circuits, matrices, differential equations, digital logic paradigms and programming. EE5301 is desirable but not essential.

Grading
  • Midterm (Thu Mar 24, tentative): 25%.
  • Final (Sat May 14): 40%. The final will consist of separate theory and practical components and will be approx 4 hours long in all.
  • Homeworks: 35%.